Hi @DiB, seems the JN4012 OS uses a different pinmux for GPIO12, but the Jetpack 6.2 BSP archive was pulled and is no longer offered on the manufacturer’s website as of today. For Jetpack 5.1.2 for example, the only difference between the vanilla Jetpack was a small change for a HDMI pin in tegra234-mb2-bct-scr-p3767-0000.dts, unrelated to GPIOs.
Now, if you would like to use that GPIO as output, you can try use devmem from the container to configure it as output.
gpioinfo
shows the label as PN.01 and cat /sys/kernel/debug/pinctrl/2430000.pinmux/pinconf-groups
says this is SOC_GPIO39
and it is set as input:
5 (soc_gpio39_pn1):
pull=1
tristate=1
enable-input=1
open-drain=1
io-reset=1
rcv-sel=1
io-hv=1
schmitt=0
pull-down-strength=0
pull-up-strength=0
drive-type=0
gpio-mode=0
function=rsvd1
Looking in the Orin Series Technical Reference Manual at page 6393 I see PADCTL_EDP_SOC_GPIO39_0
has offset 0x20
and the pad control registers are called PADCTL_A16
- page 6388. At page 57 of the reference manual I see the base address for PADCTRL_A16: PADCTL_A16 0x02440000
, so the register address for this pin is base address + offset -0x02440020
.
Going back to the devmem docs I see that for using a pin as GPIO, we need to set Bits 10, 6 and 4 to 0, and then write that value from the container.
The initial value when it is configured as input is:
busybox devmem 0x02440020
0x00000055
and to configure it as output I did:
busybox devmem 0x02440020 w 0x5
pinconf-groups then reports
5 (soc_gpio39_pn1):
pull=1
tristate=0
enable-input=0
and with gpioset --mode=wait gpiochip0 85=1
I can then see 3.3V between pins 14 and 15 of the 40 pin header.